The tables below list all documented opcodes for IBM mainframe processors. Each opcode links to a text section with some additional info on the pertinent opcode.
Special thanks:
to David Bond for his
instruction
lists and
tables.
To Jan Jaeger for his
list of
instructions
not listed in IBM's Principles of Operation.
And to Tom Harper for his willingness to share the results of his
research on IBM patents relating to z/Architecture instructions.
Remark:
Please note that the creation of descriptions for all individual
instructions
is an ongoing process. As yet these descriptions have been created
only for
opcodes X'00' through X'0F'. The other opcode descriptions are to
follow later.
This page contains the following three tables:
Base Set instructions.
Other Instructions.
Assembler Directives.
Entries with a slightly darker background are no longer supported
on current mainframe hardware and/or not supported by IBM's current
version
of HLASM. The associated mnemonics are printed in italics.
Opcodes that have no (known) mnemonic assigned to them are denoted
by their
hexadecimal opcode; these are explained below the table.
Extension sets have no associated mnemonic. These are denoted by
their opcode
in hexadecimal notation. These link to additional opcode tables.
Please note that instructions X'00' thru X'3F' are register-only operations. Adding X'40' generally yields the opcode of the associated register-and-storage instruction.
Some instructions do not fit in the tables because their opcodes are currently unknown. Specifically this is the case for the instructions below. These are all either Coupling Facility (CF) instructions, or MicroCode (MC) instructions. We do know a few opcodes that have been assigned to Coupling Facility instructions, but we have not been able to link any of these to one of the instructions below.
For PXLO we know of various subfunctions, what we know has been included in the table. SYSOP, too, appears to support subfunctions, unfortunately, we have not been able to locate any details at all.
The empty slots indicate instructions that we have been able to associate with an opcode after all.
Facility | Operation description | Facility | Operation description | Facility | Mnemonic | Operation description | Facility | Mnemonic | Subfunction description |
---|---|---|---|---|---|---|---|---|---|
CF | MC | MC | BRS | Branch Relative Special | MC | PXLO | Invalidate Page Table Entry | ||
CF | Test Vector Entry | MC | MC | DIP | Drain Instruction Pipeline | MC | PXLO | Load Absolute Address | |
CF | Set Vector Entry | MC | MC | EXAR | EXtract Access Register | MC | PXLO | Load Address Space Control Element | |
CF | Test Vector Summary | MC | MC | EXARI | EXtract Access Register Indirect | MC | PXLO | Load Host Page Table Entry | |
CF | MC | AND Logical Immediate | MC | EXGRI | EXtract program General Register Indirect | MC | PXLO | Load Host Real Address | |
CF | Send Message | MC | OR Logical Immediate | MC | EXINT | EXtract INTerrupt | MC | PXLO | Load Page Table Entry |
CF | test message | MC | Insert Immediate Special Register | MC | EXTV | EXTract Via register-operand register | MC | PXLO | Load Real Address |
CF | Prepare Channel Buffer | MC | EXtract program General Register | MC | MCEND | MilliCode END | MC | PXLO | Purge Data Cache |
CF | Signal Channel buffer | MC | Set Program General Register | MC | MSET | Millicode SET via register-operand register | MC | PXLO | Purge Instruction Cache |
CF | Test Channel Buffer | MC | MC | MVCX | MoVe Characters eXecution | MC | PXLO | Purge TLB | |
CF | Move Channel Buffer Data | MC | MC | OSR | Or Special Register | MC | PXLO | Read TLB | |
CF | Locate Channel Buffer | MC | Set Program Access Register | MC | PXLO | Perform trans(X)Lator Operation | MC | PXLO | Write TLB |
CF | Transfer Structure | MC | Set Program Access Register Indirect | MC | RIRPT | Reset InterRuPTion | MC | SYSOP | various subfunctions |
MC | SPGRI | Set Program General Register Indirect | |||||||
MC | SYSOP | SYStem OPeration | |||||||
MC | TMBP | Test Millicode Branch Points |
Assembler directives have no opcodes associated with them. Therefore we list them in a separate table. Please see below.
Assembler Directive | Description | Macro Directive | Description | DC/DS Field Type | Description |
---|---|---|---|---|---|
ACONTROL | Assembler CONTROL | ACTR | Assembler CounTeR | A | Address |
ADATA | Associated DATA | AGO | Assembler GO to | AD | Address in Doubleword |
AEJECT | Assembler EJECT macro listing | AGOB | Assembler GO Backward | B | Binary data |
ALIAS | ALIAS definition | AIF | Assembler IF | C | Character data |
AMODE | Addressing MODE | AIFB | Assembler IF Backward | CA | Character data Ascii |
CATTR | Class ATTRibutes | AINSERT | Assembler INSERT source line | CE | Character data Ebcdic |
CCW | Channel Command Word | ANOP | Assembler No-OPeration | CU | Character data Unicode |
CCW0 | Channel Command Word format-0 | AREAD | Assembler READ source record | D | Double hfp data |
CCW1 | Channel Command Word format-1 | ASPACE | Assembler SPACE macro listing | DB | Double Bfp data |
CEJECT | Conditional EJECT listing | GBLA | GloBaL Arithmetic variable | DD | Double Dfp data |
CNOP | Computer No-OPeration | GBLB | GloBaL Boolean variable | DH | Double Hfp data |
COM | COMmon control section | GBLC | GloBaL Character variable | E | Exponential hfp data |
COPY | COPY member | LCLA | LoCaL Arithmetic variable | EB | Exponential Bfp data |
CSECT | Control SECTion | LCLB | LoCaL Boolean variable | ED | Exponential Dfp data |
CXD | Cumulative eXternal Dummy length | LCLC | LoCaL Character variable | EH | Exponential Hfp data |
DC | Define Constant | MACRO | MACRO start | F | Fixed-point binary data |
DROP | DROP | MEND | Macro END | FD | Fixed-point Doubleword binary data |
DS | Define Storage | MEXIT | Macro EXIT | G | Graphic character data |
DSECT | Dummy SECTion | MHELP | Macro HELP | H | Halfword signed binary data |
DXD | Define eXternal Dummy section | MNOTE | Macro NOTE | J | J-type data length of external dummy section or class |
EJECT | EJECT listing | SETA | SET Arithmetic variable | JD | J-type data Doubleword length of external dummy section or class |
END | END assembly | SETAF | SET Arithmetic variable by external Function | L | Long exponential hfp data |
ENTRY | ENTRY point | SETB | SET Boolean variable | LB | Long exponential Bfp data |
EQU | EQUate | SETC | SET Character variable | LD | Long exponential Dfp data |
EXITCTL | EXIT ConTroL values | SETCF | SET Character variable by external Function | LH | Long exponential Hfp data |
EXTRN | EXTeRNal symbol | LQ | Long exponential hfp data Quadword aligned | ||
ICTL | Input ConTroL | P | Packed decimal data | ||
ISEQ | Input SEQuence checking | Q | Q-type data external dummy section offset |
||
LOCTR | LOCaToR | QD | Q-type Doubleword data external dummy section offset |
||
LTORG | LiTeral pool ORiGin | QY | Q-type Yonder external dummy section offset |
||
OPSYN | OPcode SYNonym | R | Relocatable psect address | ||
ORG | ORiGin | RD | Relocatable Doubleword psect address | ||
POP | POP stacked status | S | Standard base-displacement address | ||
PRINT settings | SY | Standard Yonder base-displacement address | |||
PROCESS | PROCESSing options | V | oVerlay address | ||
PUNCH | PUNCH object record | VD | oVerlay Doubleword address | ||
PUSH | PUSH status onto stack | X | heXadecimal data | ||
REPRO | REPROduce as object record | Y | Y-type data address |
||
RMODE | Residence MODE | Z | Zoned decimal data | ||
RSECT | Reenterable SECTion | ||||
SPACE | SPACE listing | ||||
START | START assembly | ||||
TITLE | TITLE definition | ||||
USING | USING | ||||
WXTRN | Weak eXTeRNal | ||||
XATTR | eXternal ATTRibutes |
This site is a member of WebRing. You are invited to browse the list of mainframe-loving sites. |
Dinos are not dead. They are alive and well and living in data centers all around you. They speak in tongues and work strange magics with computers. Beware the dino! And just in case you're waiting for the final demise of these dino's: remember that dinos ruled the world for 155-million years! | |
[ Join Now | Ring Hub | Random | | ] |
To the Base Set instructions.
To the Other Instructions.
To the Assembler Directives.
Below you find the logo of our sponsor and logos of the web-standards that this page adheres to.