HLASM - BALR = Branch And Link Register
The opcode of the BALR instruction is X'05'.
Usage
- Branch to a subroutine in a different CSECT - provided that
it can be invoked in the same addressing mode as the caller. In this case
R14 and R15 are usually used for the return address and destination
address respectively.
- Branch to a subroutine in the same CSECT - provided that
it can be invoked in the same addressing mode as the caller,
which will normally be the case. It is not unusual to use other
(less volatile) registers than R14 and R15 in this case.
- Obtain addressability to the current routine.
Arguments
- Register to receive the return address.
- Register holding the destination address.
Function
- The processor places the address of the byte following the BALR
instruction (which is both the next sequential instruction address and
the expected return address) in the first register.
- It branches to the address specified in the second register.
- The condition code does not change.
Special Cases
- If the second argument is register 0, then no branch will be taken;
only the return information is placed in the first register.
Related Instructions
- BAL branches to a routine that is directly
addressable in base-displacement form.
- BCR is the preferred return instruction.
- BASR is preferred over BALR.
- BASSM branches to another routine that may need
to be called in a different Amode.
Hardware
- All hardware supports the BALR instruction.
Remarks
- The PSW's Amode setting determines how many bits are used for the return
and destination addresses.
- Use of BALR is discouraged. Use BASR instead.
- In Amode 24 the generated return address contains 8 high-order bits with
additional PSW fields. This is usually regarded as garbage. The high-order
bit of the 32-bit register may be set to one, which may cause problems if
the called program returns with a BSM instead of one
of the BCR instructions
(typically BR instruction).
Terms Explained
- Address
- Addressability
- Amode = addressing mode
- CPU = Central Processing Unit
- CSECT = Code Section
- PSW = Program Status Word
- Processor = Central Processing Unit
- Register (32-bit versus 64-bit)
Examples
YREGS * Define register names
ENTRY BALR R15,R0 * Obtain routine address
USEBASE USING USEBASE,R15 * Make code addressable
...
L R15,=V(SUBPROG) * Load address of subroutine
BALR R14,R15 * Call subprogram
...
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